The MPC5510 Power Architecture Microcontroller

The MPC5510 family is a single-chip, highly integrated silicon SOC. The MPC5510 belongs to the expanding products that address the next wave of central body and gateway applications within the vehicle. The MP5510 automotive controller family built on 32-bit Power Architecture? Book E with a dual e200 core processors (e200z1 main core and e200z0 I/O processor) with Memory management Unit (MMU), eMIOS that perform complex I/O timing functions, FlexRay, eSCI, DSPI. An enhanced DMA (eDMA) controller with 16 channels, Crossbar Switch (XBAR) to improve data movement within the silicon. Other modules are also included such as eQADC, I2C, Boot Assist Module (BAM) and embedded FLASH and SRAM memories.

Documents.

Download the latest MPC5510RM rev1 (6/2008).

Audience:

The MPC5510 architectural training course is designed for software, hardware, firmware, test engineers, and developers who want to build the next wave of central body and gateway applications within the vehicle. System architects, project leaders, and BSP designers, device driver designers, test engineers who want to understand device architecture and requirements are also encourage to attend the this class for an in-depth understanding of the silicon system.

MPC5510 Course Agenda:

The class will cover both the hardware and software aspect of the device. Each topic is self-contained. That is, both hardware and software materials are included to make the topic complete. The class consists of lectures and exercises.

• Architectural overview of the MPC5510 silicon systems.
• Learn the latest e200 Power Architecture? Book E core programming model, register types, Signal Processing Unit (SPE), and VLE (Variable Length Encoding) APU).
• Review e200 core instruction set, branches, subroutine calls, simplified mnemonics, including the new SIMD module for DSP and floating point features.
• Write efficient exception service routines for the e200 core and Interrupt Controller (INTC) by understanding the innovative exception processing function with built-in interrupt priorities, separate critical, non-critical resources using HW or SW vector mode.
• Initialize the improved Memory Management Unit (MMU) to perform address translation, access control, and protection.
• Configure and initialize the External Bus Interface (EBI), including memory controller, bus monitor, arbiter and various external pins needed to communicate to external peripherals.
• Learn how to initialize the enhanced MIOS (eMIOS) for various timer modes to drive actuators, motors, and monitor input signals.
• Configure and initialize the enhanced DMA (eDMA) to transfer data between on-chip I/O peripherals and on-chip memory via the crossbar switch (XBAR) using inner and outer data loop controls with priority and arbitration supports.
• Configure and initialize the enhanced QADC (eQADC) to measure analog signals using various scan modes, various trigger mechanisms, various interrupt schemes, and various digital data formats. The on-board ADC has a 12-bit A/D resolution.
• Configure and initialize the popular FlexCAN, a serial communications protocol used for automotive and industrial control applications.
• Configure the FlexRay controller, a new automotive network communications protocol with higher data rate (10Mbps), time-triggered behavior, redundancy, safety, and fault tolerance features.
• Configure and initialize the Memory protection Unit (MPU) to provide HW access control rights and privileges for all memory references generated in the device.
• Learn how to initialize the MPC5510 from power-on reset. Understand and use the Boot Assist Module (BAM) for device operation after reset, but before user application. BAM is a block of read-only memory programmed by Freescale.
• Configure and initialize the enhanced SCI (eSCI) to perform serial communication using full-duplex/half-duplex, standard/non-standard baud rates, error checking with LIN and DMA supports
• Configure and initialize the I2C controller, a 2-wire, multi-master serial computer bus, to communicate with microcontrollers, memories, and other I/O peripheral devices.

Note: Total topics covered will vary depending on class size, student's background, and pace of the class. Our instructors are flexible to adapt and adjust topics to suit your requirements.

Prerequisite:

Understanding of MPC56x or MPC55x is helpful. Also, familiarity with C language especially data structure organization is advantageous. However, student’s willingness and desire to learn are the most important factors.

Fee and Registration:

• Payment must be received no later than one week prior to start of course. The fee includes course note and other applicable Rerence Manuals.
  
• Seating is limited so please register early to get the desired place and time.
  
• Course cancellation is accepted one week prior to start of class. If the student cancelled one week prior to course he/she can elect to have course substitution for the same course at different date.
  
• Student substitution is accepted from same company.
  
• If student did not cancel one week prior to class the student will be charge the full rate.
  
• PhoenixMicro Inc. has the right to cancel courses one week prior to start date due to low enrollment.