PhoenixMicro MPC566, MPC5xxCourse: "Designing with the MPC566, MPC5xx"
  Freescale MPC566, MPC5xx PPC
Audience
Course Agenda
Prerequisite
Fee and Registration

The MP566, MPC5xx Power Architecture Microcontroller

The MPC566/MPC5xx ishighly integrated 32-bit PPC RISC microcontroller device that combines high-performance data manipulation capabilities and a large on-chip flash memory with powerful peripheral subsystems. The MPC566/MPC5xx has many built in buses such as IMB3, L-Bus, U-Bus, and E-bus.

Documents.

Download the latest MPC565RM (11/2005) and the latest RCPURM rev1.

Audience:

The MPC566/MPC5xx class is designed for software, hardware, test engineers, system architects, project leaders, and BSP designers who want to design this silicon system on a chip. The MPC566 is well suited for applications such as automotive, industrial control, avionics and robotics. It has all the “enhanced” block modules found in the MPC555/556 silicon plus more.

MPC566/MPC5xx Course Agenda:

The class will cover both the hardware and software aspect of the device. Each topic is self-contained. That is, both hardware and software materials are included to make the topic complete. The class is consists of lectures and exercises.

MPC566/MPC5xx Architecture
Understand the functional descriptions of the architecture and other derivatives.
RCPU core Programming model, register types, and usage
Recognize Programming model, register types, and usage.
RCPU Core Instruction Set
Learn the instruction set, branches, subroutine calls. Also, learn how to access operands in memory.
RCPU Exception and Interrupt
Understand MPC566/5xx exception processing and how to nest and handle interrupts.
USIU (Unified System Integration Unit)
Configure the various sub-modules within the USIU block. such as controls system start-up, system initialization, and system protection, reset controller, memory controller, and external bus interface (EBI).
Burst Buffer Control (BBC) and Instruction Memory Protection Unit (IMPU)
Initialize the different components of the Burst Buffer Module. This includes the instruction memory protection unit (IMPU), the instruction code decompression unit (ICDU), and the bus interface unit (BIU).
L-bus to U-bus interface (L2U)
Program the L-bus to U-bus interface which provides an interface between a load/store bus (L-bus) and the unified bus (U-bus).
Queued Serial Multi-Channel Mode (QSMCM)
Set up the three serial communication Interfaces found in the MPC5xx device. They are the QSPI (Queued Serial Peripheral Interface) and two SCI (Serial Communication Interface).
MIOS14 (Modular input/output Subsystem)
Initialize the MIOS for the various libraries of timer functions and flexible I/O ports.
TPU3 (Timer Processor Unit 3)
Configure one of the most power modules in the MPC5xx - the TPU3. It is an intelligent semi-autonomous microcontroller design for advanced timing functions.
QADC64E (Queued Analog-Digital Converter Module-64)
Configure the QADC64E to sample 40 analog input channels. Using external multiplexers, the QADC64E can sample up to 65 total input channels.
CAN2.0B Controller Module (Controller Area Network)
Learn how to set up the Controller Area Network Module. It is an asynchronous communication protocol used in automotive and industrial control systems.
System Memories
Understand and set up various memories within the MPC565/566 device.

Note: ( Difference between MPC555/556 vs MPC565/566 devices)

The MPC565 and MPC566 devices are the enhanced versions of the MPC555 and MPC556 respectively. The MPC56x have the following features compared with MPC55x:

1) Higher operating frequencies.
2) Lower core voltage.
3) Larger on-chip memories.
4) Enhanced peripherals capabilities (i.e. three TPU3 for MPC56x vs two for MPC55x; MPC56x has enhanced interrupt controller).

However, the basic operations of the internal modules are the same for all the MPC555/6 and MPC565/6 families. The MPC565 and MPC566 devices have the same internal blocks except for the four major features described above.

The class will discuss the MPC565 and MPC566 devices with reference to the older MPC555/6 devices. Total topics covered will vary depending on class size, student's background, and pace of the class. Our instructors are flexible to adapt and adjust topics to suit your requirements.

Prerequisite:

Understanding of a RISC processor is helpful. Knowledge of various microcontroller functions is essential. Previous knowledge of MC68331 or MC68332 silicon is advantageous. However, student’s willingness and desire to learn are the most important factors.

Fee and Registration:

  • Payment must be received no later than one week prior to start of course. The fee includes course note, MPC500 PPC core user manual, MPC56x reference manual, and application notes.
  • Seating is limited so please register early to get the desired place and time.
  • Course cancellation is accepted one week prior to start of class. If the student cancelled one week prior to course he/she can elect to have course substitution for the same course at different date.
  • Student substitution is accepted from same company.
  • If student did not cancel one week prior to class the student will be charge the full rate.
  • PhoenixMicro Inc. has the right to cancel courses one week prior to start date due to low enrollment.

    Note: For pricing and availability for an ON-SITE course please use the ON-SITE Request Form.

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