The MPC603e Power Architecture processor

The Freescale MPC603e microprocessor is low-power high performance, 32-bit RISC architecture. It is ideal for desktop computers, notebooks and battery-powered systems, as well as printer and imaging equipment, telecommunications systems, networking and communications infrastructure, industrial controls, and home entertainment and educational devices. Industrial-grade, extended temperature MPC603e microprocessors are available for harsh operating environments. The MPC603e microprocessor is software- and bus-compatible with the MPC745, and MPC755 microprocessor families.

Audience:

The Power Architecture microprocessor class is designed for software, hardware, test engineers, developers who want to build systems employing the MPC603e Power Architecture microprocessor series as a host or pre-processor engine for various applications. System architects, project leaders, and BSP designers who want to understand device architecture and requirements are also encourage to attend the class for an in-depth understanding.

MPC603e Course Agenda:

The class will cover both the hardware and software aspect of the device. Each topic is self-contained. That is, both hardware and software materials are included to make the topic complete. The class is consists of lectures and exercises.

• Overview of the MPC603e RISC architecture.
• Understand how the MPC603e hardware pipelining, split bus transaction, data and address tenures work. Learn how to apply these features in your design.
• Recognize the programming model, register types, and usage.
• Review instruction set, branches, subroutine calls, simplified mnemonics, and accessing operand in memory.
• Write efficient interrupt routine service by understanding how exception processing works, and how to nest interrupts.
• Understand instruction cache and data cache. How to configure and optimize them for your application.
• Configure the Memory Management Unit (MMU) to perform address translation and enable access control and protection.
• Understand how the external 60x bus signals operate, and learn to interface external devices to your MPC603e.
• Learn how to utilize the 60x bus for single and multiprocessor environment.

Note: Total topics covered will vary depending on class size, student's background, and pace of the class. Our instructors are flexible to adapt and adjust topics to suit the requirements.

Prerequisite:

Understanding or general CISC processor such as MC68000 family or equivalent is helpful. Also, familiarity with other RISC processors such as MIPS or ARMS, or equivalent is preferred. However, student’s willingness and desire to learn are the most important factors.

Fee and Registration:

• Payment must be received no later than one week prior to start of course. The fee includes course note, MPC603e user manual, and other applicable handouts.
  
• Seating is limited so please register early to get the desired place and time.
  
• Course cancellation is accepted one week prior to start of class. If the student cancelled one week prior to course he/she can elect to have course substitution for the same course at different date.
  
• Student substitution is accepted from same company.
  
• If student did not cancel one week prior to class the student will be charge the full rate.
  
• PhoenixMicro Inc. has the right to cancel courses one week prior to start date due to low enrollment.
  

  Note: For pricing and availability for an ON-SITE course please use the ON-SITE Request Form.