PhoenixMicro MPC834x Course: "Designing with the PowerQUICC II™ Pro - MPC8349E, MPC8347E and MPC8343E"

 

MPC834x PQ II PRO
Audience
Course Agenda
Prerequisite
Fee and Registration


The MPC83xx PowerQUICC II PRO Power Architecture Host Processor

The MPC834x PowerQUICC II Pro is a single-chip, highly integrated microcontroller. It has a 32-bit RISC e300 Core (enhanced version of the 603e with larger caches) as a host processor and dedicated peripherals such as Triple Speed Ethernet (TSEC) controllers, a DDR/DDR2 SDRAM memory controller, a second memory controller via Local Bus Interface Unit ( LBIU), PCI controllers, PIC, 4-channel DMA controllers, USB, SPI, I2C, DUART, a HW Security Engine, and much more.

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Download the latest MPC8349EARM (rev1 8/2006)

Audience:

The MPC8349E/47E/43E PowerQUICC II Pro training course is designed for software, hardware, firmware, test engineers, and developers who want to build communication and networking applications. System architects, project leaders, and BSP designers who want to understand device architecture and requirements are also encourage to attend the class for an in-depth understanding of the silicon system.

MPC834x Course Agenda:

The class is a 4-day class that will cover both the hardware and software aspect of the device. Each topic is self-contained. That is, both hardware and software materials are included to make the topic complete. The class consists of lectures and exercises.

  • Overview of the functional description of the MPC834x architecture and other derivatives.
  • Understand the PQII Pro internal memory map structure and inbound/outbound window mapping and address translation operation.
  • Learn the e300 programming model, register types, and usage.
  • Review e300 instruction set, branches, subroutine calls, simplified mnemonics, and accessing operand in memory.
  • Write efficient e300 interrupt routine services by understanding how exception processing works, and how to nest interrupts. Learning this topic along with the IPIC section will help designers optimize their interrupt service routine and improve interrupt service time.
  • Configure and optimize the e300 Harvard Architecture instruction cache and data cache to suit your applications.
  • Initialize the e300 Memory Management Unit (MMU) to perform address translation and enable access control and protection.
  • Program the TSEC to transmit and receive Ethernet frames at 10/100/1000 Mbps. Understand support for out-of-sequence transmit queue, and learn the Register-based statistical module supports (MIB)and Remote Monitoring (RMON) functions.
  • Configure and initialize the Integrated Programmable Interrupt Controller (PIC) to prioritize and recognize internal and external interrupt sources.
  • Program and initialize the DMA controller, SPI, I2C, DUART modules.
  • A second memory controller may be used to improve performance or increase system flexibilities. Learn to configure and initialize this Local Bus Interface Unit (LBIU) controller to interface to static memories (SRAM, EEPROM, FLASH, I/O periperals), DRAM memory, and SDRAM memory using GPCM, UPM, and SDRAM controllers, respectively.
  • Configure and initialize the reset controller to detect conditions that will cause internal reset.
  • Configure and initialize the PCI controller block.
  • Understand how the Security Engine Block (SEC) works.
  • Understand how the USB Controller works.

Note: Total topics covered will vary depending on class size, student's background, and pace of the class. Our instructors are flexible to adapt and adjust topics to suit the requirements.

Prerequisites:

Understandings of MPC8xx (PowerQUICC I™) and data communication fundamentals are helpful. Also, familiarity with C language especially data structure organization is advantageous. However, student’s willingness and desire to learn are the most important factors.

Fee and Registration:

  • Payment must be received no later than one week prior to start of course. The fee includes course note, MPC834x user manual, Power Architecture microprocessor family programming environment, and other applicable handouts.
  • Seating is limited so please register early to get the desired place and time.
  • Course cancellation is accepted one week prior to start of class. If the student cancelled one week prior to course he/she can elect to have course substitution for the same course at different date.
  • Student substitution is accepted from same company.
  • If student did not cancel one week prior to class the student will be charge the full rate.
  • PhoenixMicro Inc. has the right to cancel courses one week prior to start date due to low enrollment.

    Note: For pricing and availability for an ON-SITE course please use the ON-SITE Request Form.

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