MPC885, MPC8xx PowerQUICC I Power Architecure Host Processor
The MPC885, MPC8xx PowerQUICC (Quad Integrated
Communications Controller) is a single-chip, highly integrated
microcontroller that uses 32-bit RISC Power Architecture (PPC)
as a core processor and another dedicated 32-bit RISC communication
processor (CP) used for communication and networking functions.
Audience:
The MPC885, MPC8xx class is designed
for Software and Hardware engineers and developers who want
to build communication and networking applications. System
architects, project leaders, and BSP designers who want to
understand device architecture and requirements are also encourage
to attend the class for an in-depth understanding of the silicon
system.
MPC885, MPX8xx Course Agenda:
The class will cover both the
hardware and software aspect of the device. Each topic is
self-contained. That is, both hardware and software materials
are included to make the topic complete. The class is consists
of lectures and exercises.
- Overview of the functional
description of the MPC885, MPC8xx architecture and other
derivatives.
- Learn the Power Architecture core programming
model, register types, and usage.
- Review PPC core instruction
set, branches, subroutine calls, simplified mnemonics, and
accessing operand in memory.
- Write efficient PPC core interrupt
routine service by understanding how exception processing
works, and how to nest interrupts.
- Configure and optimize the
PPC instruction cache and data cache to suit your application.
- Initialize the Memory Management
Unit (MMU) to perform address translation and enable access
control and protection.
- Learn how to calculate serial
communication performance based on your application.
- Program the Serial Communication
Controllers (SCCs) to transmit and receive UART characters,
transmit and receive HDLC packets, transmit and receive
Ethernet frames.
- Program and configure the
Fast Ethernet Controllers (FEC) to transmit and receive
Ethernet frames at 10/100Mbps rate.
- Configure and initialize the
Serial Management Controller (SMCs) to handle various low
speed serial protocols.
- Configure and initialize the
Time Division Multiplexer (TDM) block.
- Configure and program SPI,
I2C blocks to perform transmit and receive functions.
- Configure and initialize the
interrupt controller to prioritize and recognize internal
and external interrupt sources.
- Configure and program the
IDMA to perform direct memory/peripheral data transfer.
- Configure and initialize the
memory controller to interface to static memory, such as
SRAM, EPROM, FEPROM and dynamic memory using GPCM and UPM
controllers respectively.
- Configure the CP to perform
DSP functions.
- Configure the external pins
for the desired pin functions by programming port configuration
block.
- Configure and initialize the
reset controller to detect conditions that will cause internal
reset.
- Review the design checklist
for HW, SW errata, new info, layout rules etc...before using
the MPC8xx family of devices.
Note: Total topics covered will vary depending on class size, student's
background, and pace of the class. Our instructors are flexible
to adapt and adjust topics to suit the requirements. Supplemental
handouts maybe needed in addition to the course note depending
on product focus (i.e. MPC885, MPC880, MPC875, MPC870 etc…).
Prerequisite:
Understanding of MC68360, RISC
processor architecture, and communication protocols are helpful.
Also, familiarity with C language especially data structure
organization is advantageous. However, student’s willingness
and desire to learn are the most important factors.
Fee and Registration:
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