MSC8101/02/03 Digital Signal Processor:

The MSC8101/02/03 processor series are high performance, StarCore® architecture-based DSP. It is an ideal processor for seamless system integration, flexible network connectivity, and advanced signal processing performance.

Audience:

The MSC8101/02/03 class is designed for software and hardware engineers, developers who want to build systems employing the MSC8101/02/03 StarCore architectured based DSP for advanced signaling processing performance and network connectivities. System architects, project leaders, and BSP designers who want to understand device architecture and requirements are also encourage to attend the class for an in-depth understanding.

MSC8101/02/03 Course Agenda:

The class will cover both the hardware and software aspect of the device. Each topic is self-contained. That is, both hardware and software materials are included to make the topic complete. The class consists of lectures and exercises.

• A general understanding and overview of the (StarCore) SC140 DSP Core
  
• Understand the Enhanced Filter Coprocessor (EFCOP).
  
• Review the functions of the DMA Engine.
  
• Learn how to use the Internal Memory and other Buses (QBus and 60x System Bus).
  
• Learn how configure from POR and configure various initial requirements and clock settings.
  
• Program the memory controller to interface to static memories (SRAM, Flash, ROM, EEPROM) and dynamic memories (SDRAM and DRAM) using GPCM, SDRAM and UPM memory controllers.
  
• Write efficient interrupt service routines by understanding how exception processing works, and how to nest interrupts.
  
• Understand how the Communication Processor Module (CPM) block works.
  
• Initialize the Fast Communication Controllers (FCCs) to transmit and receive HDLC packets, Fast Ethernet frames, and ATM cells.
  
• Program the Serial Communication Channels (SCCs) for UART, HDLC, and Ethernet Protocols.
  
• Configure Multi-Channel Controllers (MCCs) for HDLC and Transparent protocols for up to 128 channels per MCC.
  
• Configure the Time Slot Assigner (TSA) for Time Division Multiplexing (TDM) and non-multiplexing serial interface (NMSI) function.
  
• Other optional topics that are offered are SMC, SPI, I2C and Timers.
  

Note: Total topics covered will vary depending on class size, student's background, and pace of the class. Our instructors are flexible to adapt and adjust topics to suit your requirements.

Prerequisite:

Basic understanding of digital signal processors, and communication protocols are helpful. Also, familiarity with C language especially data structure organization is advantageous. However, student’s willingness and desire to learn are the most important factors.

Fee and Registration:

• Payment must be received no later than one week prior to start of course. The fee includes course note, MSC810x user manual, family programming environment, and other applicable handouts.
  
• Seating is limited so please register early to get the desired place and time.
  
• Course cancellation is accepted one week prior to start of class. If the student cancelled one week prior to course he/she can elect to have course substitution for the same course at different date.
  
• Student substitution is accepted from same company.
  
• If student did not cancel one week prior to class the student will be charge the full rate.
  
• PhoenixMicro Inc. has the right to cancel courses one week prior to start date due to low enrollment.
  

  Note:For pricing and availability for an ON-SITE course please use the ON-SITE Request Form.