MPC745/55 Power Architecture Microprocessor

The MPC745/55 microprocessor is a high performance, 32-bit RISC architecture. It is an ideal microprocessor for leading edge computing, embedded controller applications. There will also be an additional topic on the latest G5 e500 processor core.

What is the difference between the MPC745 and MPC755.

MPC755 and MPC745 processors differ only in that the MPC755 features an enhanced, dedicated L2 cache interface with on-chip L2 tags. The MPC755 is a drop-in replacement for the award winning MPC750 processor and is footprint and user software code compatible with the MPC7400 processor with AltiVec ™ technology. The MPC745 is a drop-in replacement for the MPC740 processor and is also footprint and user software code compatible with the MPC603e processor. MPC755/745 processors provide on-chip debug support and are fully JTAG-compliant.

Audience:

The MPC745/55 microprocessor class is designed for software, hardware engineers, and developers who want to build systems using these superscalar microprocessor series as a host or pre-processor engine for various applications. System architects, project leaders, and BSP designers, test engineers, technicians, who want to understand device architecture are also encourage to attend the class for an in-depth knowledge.

Power Architecture MPC745/55 Course Agenda:

The class will cover both the hardware and software aspect of the device. Each topic is self-contained. That is, both hardware and software materials are included to make the topic complete. The class is consists of lectures and exercises.

• Overview of the MPC745, MPC755 architecture series.
• Recognize the programming model, register types, and usage.
• Review instruction set, branches, subroutine calls, simplified mnemonics, and accessing operand in memory.
• Write efficient interrupt routine service by understanding how exception processing works, and how to nest interrupts.
• Understand the MPC745/55 L1 instruction cache and data cache, and learn how to configure and optimize them for your application.
• MPC755 only: Learn how to use L2 cache controller to extend the internal L1 cache capabilities.
• Configure the memory management unit (MMU) BATs and TLBs to perform address translation and enable access control and protection.
• Learn how the MPC745/55 fetch, dispatch, execute instructions using timing diagrams.
• Understand MPC745/55 hardware pipelining, split bus transaction, enveloped write transaction. Learn how to apply these features in your design.
• Review the functions and behaviors of the MPC745/55 60x bus signals and learn to apply them in single and multiprocessor environment.
• Understand how to utilize both automatic and program-controlled power reduction modes with on-chip power management resources.
• Optimize and test your hardware and software designs by using the performance monitoring (PMs) capabilities of the MPC745/55 microprocessor series.
• An additional short topic on the new G5 e500 processor core. The most advance PPC Motorola Book E version.

Note: Total topics covered will vary depending on class size, student's background, and pace of the class. Our instructors are flexible to adapt and adjust topics to suit the requirements.

Prerequisite:

Understanding of general CISC processor such as MC68000 family or equivalent is helpful. Also, familiarity with other RISC processors such as MIPS or ARM, or equivalent is preferred. However, student’s willingness and desire to learn are the most important factors.

Fee and Registration:

• Payment must be received no later than one week prior to start of course. The fee includes course note, MPC745/55 user manuals, and other applicable handouts.
  
• Seating is limited so please register early to get the desired place and time.
  
• Course cancellation is accepted one week prior to start of class. If the student cancelled one week prior to course he/she can elect to have course substitution for the same course at different date.
  
• Student substitution is accepted from same company.
  
• If student did not cancel one week prior to class the student will be charge the full rate.
  
• PhoenixMicro Inc. has the right to cancel courses one week prior to start date due to low enrollment.
  

  Note:For pricing and availability for an ON-SITE course please use the ON-SITE Request Form.