Designing with the MPC74xx Power Architecture Microprocessor
"Including the latest MPC7448"

  MPC74xx Power PC
Audience
Course Agenda
Prerequisite
Fee and Registration

The MPC74xx Power Architecture Microprocessor

The MPC74xx microprocessor is a high performance, 32-bit RISC architecture combined with a full 128-bit implementation of Freescale's Altivec™ technology. It is an ideal microprocessor for leading edge computing, embedded controller, and signal processing applications.

Audience:

The Power Architecture microprocessor class is designed for software and hardware engineers, developers who want to build systems employing the MPC74xx Power Architecture microprocessor series as a host or pre-processor engine for various applications. System architects, project leaders, and BSP designers, test engineers, and technicians who want to understand device architecture and requirements are also encourage to attend the class for an in-depth understanding.

Power Architecture MPC74xx Course Agenda:

The class will cover both the hardware and software aspect of the device. Each topic is self-contained. That is, both hardware and software materials are included to make the topic complete. The class is consists of lectures and exercises.

  • Overview of the MPC74xx architecture series.
  • Recognize the programming model, register types, and usage.
  • Review instruction set, branches, subroutine calls, simplified mnemonics, and accessing operand in memory.
  • Write efficient interrupt routine service by understanding how exception processing works, and how to nest interrupts.
  • Understand MPC74xx L1 instruction cache and data cache. How to configure and optimize them for your application.
  • Learn how to use L2-cache and L3-cache cache controllers to extend the L1-cache internal memory.
  • Configure the memory management unit (MMU) to perform address translation and enable access control and protection.
  • Learn how to utilize the 60x bus and MPC bus for single and multiprocessor environment.
  • Learn how to use the 60x external pins to interface to static memories and external peripherals.
  • Understand MPC74xx hardware pipelining, split bus transaction, enveloped write transaction. Learn how to apply these features in your design.
  • Review the AltiVec™ Technology that enables the single instruction multiple data (SIMD) features.
  • Understand the AltiVec Instruction set and how they can be used for DSP applications.
  • Optimize and test your hardware and software designs by using the performance monitoring capabilities of the MPC74xx microprocessor series.

Note: Total topics covered will vary depending on class size, student's background, and pace of the class. Our instructors are flexible to adapt and adjust topics to suit the requirements.

Prerequisite:

Understanding of general CISC processor such as MC68000 family or equivalent is helpful. Also, familiarity with other RISC processors such as MIPS or ARMS, or equivalent is preferred. However, student’s willingness and desire to learn are the most important factors.

Fee and Registration:

  • Payment must be received no later than one week prior to start of course. The fee includes course note, MPC74xx user manuals, and other applicable handouts.
  • Seating is limited so please register early to get the desired place and time.
  • Course cancellation is accepted one week prior to start of class. If the student cancelled one week prior to course he/she can elect to have course substitution for the same course at different date.
  • Student substitution is accepted from same company.
  • If student did not cancel one week prior to class the student will be charge the full rate.
  • PhoenixMicro Inc. has the right to cancel courses one week prior to start date due to low enrollment.

    Note:For pricing and availability for an ON-SITE course please use the ON-SITE Request Form.

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